The present invention relates to a circuit substrate device having a structure where a semiconductor element is electrically connected via electrode lugs to a conductive pattern formed on the substrate.
Some circuit substrate devices have a structure where semiconductor chips (flip chips) are bonded and electrically connected to the conductive pattern on a circuit substrate. The semiconductor chips have solder bumps which form electrode lugs. In such circuit substrate devices, a failure mode tends to occur in which thermal fatigue is produced due to differential in coefficients of thermal expansion between the flip chip and circuit substrate, thereby causing fractures in the solder bumps. It is known that the thermal fatigue characteristics of the solder bumps may be improved by altering shape of the solder bumps. For example, Japanese Patent Publication No. 62333/1988 discloses a method for mitigating thermal fatigue in solder bumps by forming them into longer columns which, however, require preformed solder bumps of larger area. Accordingly, the above-mentioned method is disadvantageous in that the shape of solder bumps would prevent miniaturization of the device and high-density packaging of flip chips. In addition, it is not easy to form such solder bumps in desired column shapes.
Accordingly, it is an object of the present invention to provide a circuit substrate device that is resistant to thermal fatigue.
Another object of the invention is to provide a circuit substrate device that may be manufactured in a small size with high density packaging of flip chips.
Still another object of the invention is to provide a circuit substrate having its higher reliability and longer life in operation at an elevated temperature.